Remember the Standard Vt Equation?Short Channel MOS TransistorVt V fb 2ψ B 2qN aε si 2ψ BCox Y. Taur, T. Ning, Fundamentals of Modern VLSI Devices,Cambridge University Press, 2002.Professor Chris H. Kim Detailed derivation given in Taur’s book Basically, three termsUniversity of MinnesotaDept. of ECE– Flat band voltage– 2ψB: the magic number for on-set of inversion– Oxide [email protected]/ chriskim/2Body Effect (Back Bias)Body Effect (Back Bias)Vt 0 V fb 2ψ B CoxVt V fb 2ψ B Vsb Vt V fb 2ψ B Drain2qN aε si 2ψ B2qN aε si 2ψ B VsbCox2qN aε si 2ψ B VsbCoxGate VsbSourceBody VsbVsb 0 : RBBVsb 0 : FBB Body effect degrades transistor stack performance However, we need a reasonable body effect for post silicontuning techniques Reverse body biasing, forward body biasing3 Vt can be adjusted by applying FBB or RBB– Essential for low power and high performance– Will talk about body biasing extensively later on41

Body Biasing for Process CompensationNormalized leakageDie count100%80%60%40%20%0%6Accepteddies:NBBShort Channel Effect: Vt roll-off110C1.1VLong ChannelShort Channeln poly gateABBn poly gaten source5ABB4n sourcen draindepletionCharge sharingn drainCharge sharingp-type bodyp-type body3Body bias:controllabilityto Vt21NBB00.92511.0751.15Normalized frequencyEcEc Ability of gate & body to control channel charge diminishesas L decreases, resulting in Vt-roll-off and body effectreduction1.2255Short Channel Effect: Vt roll-off6Short Channel Effect: Drain InducedBarrier Lowering (DIBL)Long ChannelShort Channeln poly gateVtn sourcen poly gaten sourcen drainn draindepletion3σ L variationp-type bodyp-type bodyEcLeffVds 3σ Vt variation increases in short channel devicesEcVds Increase in VDS reduces Vt and increases Vt-roll-off: DIBL82

Short Channel Effect: DIBLShort Channel Effect: Drain InducedBarrier Lowering (DIBL)Vds 2.0VVtlog(Ids)Vt roll-off (Vds 0V)log(Ids)Vds 0.1VDIBL Vt roll-off(Vds Vdd)Vgs (NMOS) LeffVgsΔVtDIBL coefficient λd ΔVds(PMOS)DIBL increases leakage currentDynamic Vdd can reduce leakage because of DIBL 9Short Channel Vt EquationCox0.70.6(Long channel Vt equation)PMOS0.2S. Thompson et al., 1998.0.40 Xj2W 1 λb 1 1 LXj 50100150Junction Depth (nm)0.1200SalicidePoly-Si[Ng, TED, 1993] L 2 2.2μm (Tox 0.012 μm)(Wsd 0.15μm)( X j 2.9μm) 0.30.5[Poon, IEDM, 1973] 0.4NMOS1300.2L MET0.15R EXT0.1120R EXT ( Ω μm)2qN aε si 2ψ B0.5L MET ( μm)Cox0.82qN aε s ( 2ψ B Vsb ) λdVdsIDP (mA/ μ m)Vt V fb 2ψ B λbTransistor Scaling Challenges - XjIDN (mA/ μ m)Vt V fb 2ψ B 101101000.05S. Thompson et al., 1998.09050100150200Junction Depth (nm)0S. Asai et al., 1997.Salicide 2.7λd RCRSE11Rsalicide123

Effect of Series ResistanceLeakage Components(10nm Device)Weak Inversion Current,Drain Induced Barrier Loweringand Narrow Width EffectGate Oxide TunnelingGateSourceDrainn n Punchthroughp-subGate Induced DrainLeakage (GIDL)Reverse Bias Diode& BTBTBulk[Keshavarzi, Roy, and Hawkins, ITC 1997]13Sub-Threshold Current14Sub-Threshold Currentq (V gs Vt ) qVds k T WmkTkT(1 e)I d μ eff Cox B (m 1) eqL 2 NPN BJT is formed in sub-threshold region Only difference with a real BJT is that the base voltage iscontrolled through a capacitive divider, and not directlyby a electrode Like in a BJT, current is exponential to Vbe15164

Vdd and Vt ScalingSub-Threshold SwingPerformance vs Leakage:CdepkTln 10 (mV) , m 1 decqCoxlog(IDS)S mVT IOFF ID(SAT) I OFF Smaller S-swing is better Ideal case: m 1 (Cox Csub)– Fundamental limit 1 * 26mV * ln10 60 mV/dec @ RT– Can only be achieve by device geometry (FD-SOI)WeffLeffI D ( SAT ) WeffLeff VTK1emkT / qIOFFLK 2 (VGS VT ) 2IOFFHVTL VTHI D ( SAT ) K 3Weff Coxυ SAT (VGS VT ) Typical case: m 1.3– S 1.3 * 26mV * ln10 80 mV/dec @ RT– At worst case temperature (T 110C), S 100 mV/decVGSÖ As Vt decreases, sub-threshold leakage increasesÖ Leakage is a barrier to voltage scaling1718Vdd and Vt ScalingGate Oxide Tunneling LeakageNow, consider we scale the Vt to 100mVIoff 10μA/μm x 10-1 1 μA/μm103 322.5nm3.5nmIGATE (A/cm2) Vt cannot be scaled indefinitely due to increasing leakagepower (constant sub-threshold swing) ExampleCMOS device with S 100mV/dec has Ids 10μA/μm@ Vt 500mVIoff 10μA/μm x 10-5 0.1 nA/μm100010-72345675.1nmIGATE7.6nm3.0nmIOFFC. Hu, 1996.02468e-10 12Gate Voltage (V)N GateSuppose we have 1B transistors of width 1μmIsub 1μA/μm x 1B x 1μm 100 A !!19P- Substrate205

Gate Oxide Tunneling LeakageBand-to-Band Tunneling LeakageEC Quantum mechanics tells us that there is a finiteprobability for electrons to tunnel through oxide Probability of tunneling is higher for very thinoxides NMOS gate leakage is much larger than PMOS Gate leakage has the potential to become one ofthe main showstoppers in device scalingI gate AEox e2 BEoxq(Vbi Vapp)EVECp( )-siden( )-sideEVS/D junction BTBT LeakageV Vt, Eox ddtox Reversed biased diode band-to-band tunneling– High junction doping: “Halo” profiles– Large electric field and small depletion width at the junctions21Gate Induced Drain Leakage (GIDL) Appears in high E-field region under gate/drainoverlap causing deep depletion Occurs at low Vg and high Vd bias Generates carriers into substrate from surfacetraps, band-to-band tunneling Localized along channel width between gate anddrain Thinner oxide, higher Vdd, lightly-doped drainenhance GIDL High field between gate and drain increasesinjection of carriers into substrate22Narrow Width EffectGateVtwidthWExtra depletionregionChannelSide view of MOS transistor23 Depletion region extendsoutside of gate controlledregion Opposite to Vt roll-off Depends on isolationtechnology246

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Reverse body biasing, forward body biasing Drain Gate Source Body -V sb V sb 0 : RBB V sb 0 : FBB 4 Body Effect (Back Bias) V t can be adjusted by applying FBB or RBB – Essential for low power and high perfor